Advanced SoC Fabric

Disruptive technology, reduces latency and area, effortless integration of IPs, resilience to PVT

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Design SPACE

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Machine Learning & Artificial Intelligence

Easy integration of next generation Neuromorphic Processing Units (NPU) such as Spiking Neural Network (SNN)

Low latency memory access for accelerators 

Designed for multi-core implementation

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Automotive

Ideal for heterogeneous systems

 Low Latency, safe and secure 

Built-in silicon self test and margining

Soft Failure behavior 

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Advance Process Nodes

Resilient to PVT variation

Immune to hold-time violation 

Yield recovery during early process development 

Simplified pipelining and design closure

Validated in advanced FinFET nodes

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3-D Integrated Circuits

Clock-less interconnect

 Simplified inter-die timing closure

Pin count reduction through patented compression technology 

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ARM & RISC-V Based Solutions

SoC protocol compatible (AXI, ACE, CHI, Tilelink, OPB, etc.)

Tunable PPA per channel enables optimization & flexibility

Xplorer (GUI) provides early architectural investigation