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    • Home
    • Technology
    • Innovations
    • In The News
    • Publications
    • Careers
    • About Us
    • Contact Us
  • Home
  • Technology
  • Innovations
  • In The News
  • Publications
  • Careers
  • About Us
  • Contact Us

Chronos Tech Innovations

Our commitment to enable the latest computing technology materializes with a persistent development of disruptive interconnect technology. 

  

“The electric light did not come from the continuous improvement of candles” 

(Prof. Oren Harari)


“If you defer investing your time and energy until you see that you need to, chances are it will already be too late” 

(Prof. Clayton Christensen)

Patents Portfolio

Granted

by Family

Application Specific Integrated Circuit Interconnect

1

US  9977852  B2  (2018/05/22)

US 10235488 B2  (2019/03/19)

Application Specific Integrated Circuit Link

2

US   9977853 B2   (2018/05/22)

US 10467369 B2   (2019/11/05)

US 10699048 B2  (2020/06/30)

US 10997342  B2  (2021/05/04)

System and Method for Application Specific Integrated Circuit Design

3

US 10073939 B2  (2018/09/11)

US 10467367 B2  (2019/11/05)

US 11205029  B2  (2021/12/21)

System and Method for the Design and Implementation of an IO Ports for Circ

4

US 10181939    B2   (2019/01/15)

US 10404444 B2   (2019/09/03)

US 10708034  B2   (2020/07/07)

US 11438132    B2   (2022/09/06)

ASIC Design Methodology for Converting RTL HDL to a Light Netlist

5

US 10331835 B2  (2019/06/25)

Systems and Method for Measuring Performance of an ASIC Interconnect

6

US 10637592 B2  (2020/04/28)

US 11418269  B2  (2022/08/16)

System and Method for ASIC Design Related Application Info Including a Doub

7

US 11087057 B1  (2021/08/10)


Published Pending

by Family

Application Specific Integrated Circuit Design

1

US 20190179992 A1

Application Specific Integrated Circuit Link

2

US 20210248294 A1

Advanced Centralized NoC

3

US 20220358069 A1

Systems and Method for Measuring Performance of an ASIC Interconnect

4

US 20220393777 A1


Provisional

by Family

Synch to Asynch & Asynch to Synch Circular FIFO w/ SerDes and Flow Control

1

Network on Chip Optimized for AI Workloads

2

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