Technology Advantage

Hybrid Bonding

Throughput: 5GHz freq.

Throughput: 5GHz freq.

• Correct by construction
• No MD-STA needed
• Pre & Post Bonding integrated die level testing
• No clock travelling across dies

Throughput: 5GHz freq.

Throughput: 5GHz freq.

Throughput: 5GHz freq.

• Based on 7nm TSMC
• Link speed not limited by distance
• Support for Wide data busses 

Latency: 0.6ns/mm

Throughput: 5GHz freq.

Routing Reduction: 50%

• Based on 10mm link
• Lowest latency on the market
• No clock penalties
• PPA Calculator available for quick & accurate analysis

Routing Reduction: 50%

Routing Reduction: 50%

Routing Reduction: 50%

• Based on a large mobile SoC
• Bus width reduction
• Patented compression technology
• Crosstalk mitigation

Area Reduction: 10%

Routing Reduction: 50%

Power: < 0.1pJ/bit/mm

• Based on large SoC example
• Reduced top level routing -7% 
• Clock tree removal 
• Additional savings inside IPs

Power: < 0.1pJ/bit/mm

Routing Reduction: 50%

Power: < 0.1pJ/bit/mm

• Link power comparable to source synchronous
• Self clock–gating technology
• Clock tree removal
• Substantial saving at system level with AVFS when combined with proprietary "On Die Telemetry"

Test

Security / Safety

IP Integration

• On Die Telemetry : on chip per-link performance measurement
• Simplified margining and binning
• Easier DPM analysis
• Next Generation AVFS

IP Integration

Security / Safety

IP Integration

• Ideal for heterogeneous systems
• Deployable with standard Digital Flow and Tools
• Automotive friendly
• SoC protocol compatible (ARM, RISC-V, etc)
• 3D-IC (Hybrid Bonding,TSV, etc.)

Security / Safety

Security / Safety

Security / Safety

• Low EMI profile
• Protect against Differential Power Analysis (DPA) attacks
• Hardware Trojan detection
• Soft Failure behavior