Wormhole
High Performance, Reliable and Scalable Hybrid-Bonding 3D-IO Solution
Chronos Wormhole
Chronos Wormhole is a scalable 3D-IO Hybrid-Bonding hard macro built upon reliable, clockless Chronos-LLP technology.
It supports clock speeds up to 4.0GHz with integrated clock recovery on the receiving side, offering a "plug and play" implementation that eliminates the need for complex Multi-Die Static Timing Analysis (MD-STA) for timing closure.
This architecture is uniquely flexible, allowing seamless communication between dies operating at entirely different clock frequencies.
Designed as a self-clock-gating, low-power solution, it consumes a mere 0.05pJ/bit and maintains a minimal footprint that enables ultra-fine Hybrid-Bonding pitches of less than 1um.
For a significant boost in overall system performance, Chronos Wormhole can connect directly to clockless IP, such as the Chronos-LLP NoC.
It supports clock speeds up to 4.0GHz with integrated clock recovery on the receiving side, offering a "plug and play" implementation that eliminates the need for complex Multi-Die Static Timing Analysis (MD-STA) for timing closure.
This architecture is uniquely flexible, allowing seamless communication between dies operating at entirely different clock frequencies.
Designed as a self-clock-gating, low-power solution, it consumes a mere 0.05pJ/bit and maintains a minimal footprint that enables ultra-fine Hybrid-Bonding pitches of less than 1um.
For a significant boost in overall system performance, Chronos Wormhole can connect directly to clockless IP, such as the Chronos-LLP NoC.
Wormhole-32 & Wormhole1024
Below there is a table showing the specification for both the Chronos Wormhole IP 32 and 1024 data bus width.
The Wormhole hard IP is built with a modular approach (bigger data sizes are built in bundles of 32bits) in order to easily reuse/reshape for different data bus sizes.
Redundancy & Self-Healing
Redundancy in the Chronos Wormhole HB 3D-IO is managed through the implementation of extra bundles to ensure high yield and reliability.
This architecture is designed with the constraint that the maximum defect size must be smaller than a single bundle, preventing a single defect from compromising more than four bundles.
To maintain operation despite physical imperfections, the IP features embedded self-healing behavior that automatically re-routes data from damaged bundles to available redundant ones.
This architecture is designed with the constraint that the maximum defect size must be smaller than a single bundle, preventing a single defect from compromising more than four bundles.
To maintain operation despite physical imperfections, the IP features embedded self-healing behavior that automatically re-routes data from damaged bundles to available redundant ones.
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